Hard Macro Processors

The ARM Hard Macro portfolio offers performance and power optimized hard macrocell implementations of the Cortex™-A series processors. For SoC designers looking to make a trade off between the multifaceted flexibility offered by the traditional RTL based SoC development strategy and the significant costs and efforts it involves, the ARM Hard Macro portfolio is an exciting alternative which enables higher profitability through benchmarked PPA (Performance, Power, and Area), design risk reduction and faster time to market.

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Why Hard Macros?
ARM HM Portfolio
Implementaion Options
Related Products

While soft core implementation remains the best choice for design teams wanting complete freedom and flexibility, recent industry trends are making designers look at alternatives such as using ARM Hard Macros.
ARM Hard Macros enable vendors to achieve higher levels of innovation and profitability by facilitating device differentiation and highly competitive solutions. ARM Hard Macros are also an attractive choice for designers new to the ARM architecture, or those wishing to migrate upwards to Cortex-A from ARM9 and ARM11 based designs.

Tapping into our vast pool of ARM processor, tools and implementation knowledge and experience, ARM Hard Macros provide finely tuned PPA results that are hard to beat using the traditional soft core implementation strategies for all but the most experienced design teams.

Design Challenges and Industry Trends
Hard Macro Features & Benefits

Increasing SoC Complexity
SoC complexity has increased over the last few years, with many SoC now featuring dual or quad cores.

Design Simplification
ARM Hard Macros offer significant design simplification and risk mitigation.
Time to Market Pressure
Vendors face massive challenges, with high rewards for early market penetration, but crippling consequences for project delays.
Fast Time to Market with differentiated products
ARM Hard Macros offer an assured and verified solution, allowing vendors to focus on key capabilities and differentiation.
Market Driven PPA Pressures
Designers face high pressure to hit PPA sweet spots. Getting the PPA balance right requires skill and experience with mixed Vt design, DFT/DFM, power gating etc.
PPA Assurance & Integrated Design
ARM Hard Macros offer a highly optimized and assured PPA in a integrated design that includes processor IP, POP, power domains, clock tree insertion, DFM/DFT and more in one package.
Cost and Risk Barriers
Some vendors are inhibited by the high costs and risks associated with adopting new technology, or entering new markets. Low Cost, Low Risk
ARM Hard Macros significantly lower the total cost of ownership and design risks offering vendors an easy, low cost, reduced risk route to market success.