Freescale intros multi-standard accelerator supporting 3G-LTE, WiMAX, HSPA+ and TDD-LTE base stations
Freescale Semiconductor recently introduced the industry's first multi-standard baseband accelerator device (MSBA8100) that supports 3G-LTE, wireless WiMAX, HSPA+ and TDD-LTE standards, enabling manufacturers of wireless infrastructure equipment to create substantially lower-cost, differentiated channel cards.
For carriers, this advance in silicon design brings deployment of LTE and other next-generation wireless networks closer to reality. The MSBA8100 multi-standard baseband accelerator supports legacy 2G/3G technologies as well as the newest wireless standards. Freescale is the first semiconductor company offering a customized and off-the-shelf solution fully addressing these standards. Target applications include next-generation standalone or unified 3G-LTE, WiMAX, HSPA+ and TDD-LTE equipment, as well as products that support established radio standards.
Eliminating the need to develop costly FPGA or custom ASIC devices, the baseband accelerator, together with Freescale's MSC8144 quad core digital signal processor (DSP), provides a flexible solution for a range of base station designs. This advanced Freescale technology is designed to enable OEMs to create wireless base station equipment delivering over 100Mbps data rates for low latency packets, at prices affordable enough to fuel mainstream deployment.
Freescale's MSC8144 DSP combined with the advanced MSBA8100 accelerator maintains the same flexibility as a DSP-plus-FPGA solution – at lower cost and without the expense associated with specific adaptation of a standard product. Additional bill-of-materials savings may be realized because the solution eliminates the need for expensive dedicated devices at the midterm prototype design stage. The same DSP-plus-baseband accelerator combination can be used from prototyping through final system production.
Faster time-to-market plus cost-savings
The accelerator device is engineered to efficiently support the latest Turbo and Viterbi decoding standards, along with high throughput FFT and DFT algorithms required for legacy and emerging 3G-LTE, WiMAX and HSPA+ standards. This powerful and efficient combination can speed OEM time-to-market while delivering significant cost reductions when compared to solutions used in typical prototype systems today.
Equally important to broadband wireless infrastructure manufacturers is the ability to adapt to changes in emerging standards while realizing cost savings. The MSBA8100 contains two configurable RISC engines, which can be reprogrammed in the future to accommodate updates.
The MSBA8100 also enables OEMs to take full advantage of LTE and other emerging standard capabilities. Based on the advanced Multi-Accelerator-Platform-Engine for Baseband (MAPLE-B) technology developed by Freescale, the device is designed to accelerate Turbo and Viterbi decoding, Fast Fourier Transform (FFT), Inverse Fast Fourier Transform (IFFT), Discrete Fourier Transform (DFT) and Inverse Discrete Fourier Transform (IDFT) operations currently performed in FPGA or custom ASIC devices.
Processing latency is one of the most critical parameters in broadband wireless systems to reduce the round trip time of real-time traffic. Freescale has integrated advanced high speed interfaces on both the MSBA8100 and MSC8144, such that the combination can be used for varied system topologies with very low latency. Communication with the MSC8144 DSP and the antenna are accomplished through two high speed serial RapidIO interfaces, each scalable up to four lanes at 3.125Gbaud. The MSBA8100 also includes 512 Kbytes of internal memory, a DDR-2 memory controller and a PCI controller.
In addition to Turbo and Viterbi decoding, the MSBA8100 accelerates rate de-matching for various wireless standards and security algorithms. These include EDCH for 3GPP, sub-block de-interleaving and de-interlacing with HARQ support for 3G-LTE and WiMAX.
Development system simplifies implementation
For rapid system prototyping and development, an MSBA8100ADS development board is available from Freescale, facilitating advanced development of software. The board ships with the MSBA8100 device and the MSC8144 DSP interconnected via the on-board 4x serial RapidIO switch, allowing real system-level design and development.
The board also includes an AMC expansion connector for integration with other boards over the 4x serial RapidIO interface or an ATCA chassis, as well as optimized device drivers for MSC8144 to configure, control and communicate with the MSBA8100 device. Freescale provides a robust development tools suite for its DSP products, including an integrated development environment (IDE) within the Freescale CodeWarrior toolset. In addition, reference software kernels are available to assist with customer development work.
Availability
The MSBA8100ADS development board will be available for early adopters based on acceptance into the Freescale alpha customer program. MSBA8100 device samples are expected to be available during the third quarter of 2008.
For carriers, this advance in silicon design brings deployment of LTE and other next-generation wireless networks closer to reality. The MSBA8100 multi-standard baseband accelerator supports legacy 2G/3G technologies as well as the newest wireless standards. Freescale is the first semiconductor company offering a customized and off-the-shelf solution fully addressing these standards. Target applications include next-generation standalone or unified 3G-LTE, WiMAX, HSPA+ and TDD-LTE equipment, as well as products that support established radio standards.
Eliminating the need to develop costly FPGA or custom ASIC devices, the baseband accelerator, together with Freescale's MSC8144 quad core digital signal processor (DSP), provides a flexible solution for a range of base station designs. This advanced Freescale technology is designed to enable OEMs to create wireless base station equipment delivering over 100Mbps data rates for low latency packets, at prices affordable enough to fuel mainstream deployment.
Freescale's MSC8144 DSP combined with the advanced MSBA8100 accelerator maintains the same flexibility as a DSP-plus-FPGA solution – at lower cost and without the expense associated with specific adaptation of a standard product. Additional bill-of-materials savings may be realized because the solution eliminates the need for expensive dedicated devices at the midterm prototype design stage. The same DSP-plus-baseband accelerator combination can be used from prototyping through final system production.
Faster time-to-market plus cost-savings
The accelerator device is engineered to efficiently support the latest Turbo and Viterbi decoding standards, along with high throughput FFT and DFT algorithms required for legacy and emerging 3G-LTE, WiMAX and HSPA+ standards. This powerful and efficient combination can speed OEM time-to-market while delivering significant cost reductions when compared to solutions used in typical prototype systems today.
Equally important to broadband wireless infrastructure manufacturers is the ability to adapt to changes in emerging standards while realizing cost savings. The MSBA8100 contains two configurable RISC engines, which can be reprogrammed in the future to accommodate updates.
The MSBA8100 also enables OEMs to take full advantage of LTE and other emerging standard capabilities. Based on the advanced Multi-Accelerator-Platform-Engine for Baseband (MAPLE-B) technology developed by Freescale, the device is designed to accelerate Turbo and Viterbi decoding, Fast Fourier Transform (FFT), Inverse Fast Fourier Transform (IFFT), Discrete Fourier Transform (DFT) and Inverse Discrete Fourier Transform (IDFT) operations currently performed in FPGA or custom ASIC devices.
Processing latency is one of the most critical parameters in broadband wireless systems to reduce the round trip time of real-time traffic. Freescale has integrated advanced high speed interfaces on both the MSBA8100 and MSC8144, such that the combination can be used for varied system topologies with very low latency. Communication with the MSC8144 DSP and the antenna are accomplished through two high speed serial RapidIO interfaces, each scalable up to four lanes at 3.125Gbaud. The MSBA8100 also includes 512 Kbytes of internal memory, a DDR-2 memory controller and a PCI controller.
In addition to Turbo and Viterbi decoding, the MSBA8100 accelerates rate de-matching for various wireless standards and security algorithms. These include EDCH for 3GPP, sub-block de-interleaving and de-interlacing with HARQ support for 3G-LTE and WiMAX.
Development system simplifies implementation
For rapid system prototyping and development, an MSBA8100ADS development board is available from Freescale, facilitating advanced development of software. The board ships with the MSBA8100 device and the MSC8144 DSP interconnected via the on-board 4x serial RapidIO switch, allowing real system-level design and development.
The board also includes an AMC expansion connector for integration with other boards over the 4x serial RapidIO interface or an ATCA chassis, as well as optimized device drivers for MSC8144 to configure, control and communicate with the MSBA8100 device. Freescale provides a robust development tools suite for its DSP products, including an integrated development environment (IDE) within the Freescale CodeWarrior toolset. In addition, reference software kernels are available to assist with customer development work.
Availability
The MSBA8100ADS development board will be available for early adopters based on acceptance into the Freescale alpha customer program. MSBA8100 device samples are expected to be available during the third quarter of 2008.
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I think FPGAs are still more cool..
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